EPM570T100I5N

EPM570T100I5N is an instant-on, non-volatile CPLD. It is based on a 0.18-µm, 6-layer-metal-flash process and non-volatile storage of 8Kbits. MAX II devices offer high I/O counts, fast performance, and reliable fitting versus other CPLD architectures. Featuring a MultiVolt core, a user flash memory (UFM) block, and enhanced in-system programmability (ISP), MAX II devices are designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR) and sequencing control, and device configuration control.

• Low-cost, low-power CPLD, instant-on, non-volatile architecture
• Standby current as low as 25µA, provides fast propagation delay and clock-to-output times
• Provides four global clocks with two clocks available per logic array block (LAB)
• UFM block up to 8Kbits for non-volatile storage, supports hot-socketing
• Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
• ISP circuitry compliant with IEEE Std. 1532
• 570 LEOs, 440 typical equivalent microcells
• 240 to 570 equivalent microcell range, 8,192 bits UFM size
• 160 maximum user I/O pins, 5.4ns tPD1, 304MHz fCNT, 1.2ns tSU, 4.5ns tCO
• MultiVolt core external supply voltage (VCCINT) is 3.3V, 2.5V