IR2153SPBF

IR2153SPBF is a self-oscillating half-bridge gate driver. It incorporates a high-voltage half-bridge gate driver with a front-end oscillator similar to the industry standard CMOS 555 timer. The IR2153 provides more functionality and is easier to use than the previous IC. A shutdown feature has been designed into the CT pin, so that both gate driver outputs can be disabled using a low voltage control signal. In addition, the gate driver output pulse width is the same once the rising undervoltage lockout threshold on VCC has been reached, resulting in a more stable profile of frequency vs time at startup. Noise immunity has been improved significantly, both by lowering the peak di/dt of the gate driver, and by increasing the undervoltage lockout hysteresis to 1V. Finally, special attention has been paid to maximizing the latch immunity of the device, and providing comprehensive ESD protection on all pins.

• Integrated 600V half-bridge gate driver, 15.6V zener clamp on Vcc typ (ICC=5mA, TA=25°C)
• True micropower start up, tighter initial deadtime control, low temperature coefficient deadtime
• Shutdown feature (1/6th Vcc) on CT pin, uncreased undervoltage lockout Hysteresis (1V)
• Lower power level-shifting circuit, constant LO, HO pulse widths at startup
• Lower di/dt gate driver for better noise immunity, low side output in phase with RT
• Excellent latch immunity on all inputs and outputs, ESD protection on all leads
• RT pin duty cycle range from 48 to 52% (fo <lt/> 100KHz, TA=25°C)
• Output rise time is 80nsec typ (VBIAS (VCC, VBS)=12V, CL=1000pF, CT=1nF and TA=25°C)
• Output fall time is 45nsec typ (VBIAS (VCC, VBS)=12V, CL=1000pF, CT=1nF and TA=25°C)
• 8 lead SOIC package, junction temperature range from -40 to 125°C

Warnings

Finally special attention has been paid to maximizing the latch immunity of the device and providing comprehensive ESD protection all pins. Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.