AT32UC3C2512C-A2UR

AT32UC3C2512C-A2UR is a high performance, low power 32-bit AVR® microcontroller. It is a complete system-on-chip microcontroller based on the AVR32UC RISC processor. The AT32UC3C incorporates on-chip Flash and SRAM memories for secure and fast access. For applications requiring additional memory, an external memory interface is provided on AT32UC3C0 derivatives. The Inter-IC Sound Controller (I2SC) provides a 5-bit wide, bidirectional, synchronous, digital audio link with off-chip audio devices. The controller is compliant with the I2S bus specification. AT32UC3C integrates a class 2+ Nexus 2.0 On-Chip Debug (OCD) System, with non-intrusive real-time trace, full-speed read/write memory access in addition to basic runtime control. The Nanotrace interface enables trace feature for aWire- or JTAG-based debuggers. The Peripheral Event Controller (PEVC) allows to redirect events from one peripheral or from input pins to another peripheral.

• Compact single-cycle RISC instruction set including DSP instruction set
• Read-modify-write instructions and atomic bit manipulation
• Internal high-speed SRAM, single-cycle access at full speed
• Interrupt controller, autovectored low latency interrupt service with programmable priority
• Asynchronous timer (AST) with real-time clock capability, counter or calendar mode supported
• Frequency meter (FREQM) for accurate measuring of clock frequency
• Two-wire interfaces (TWI), 400kbit/s I2 C-compatible
• QTouch® library support, on-chip non-intrusive debug system
• 64-pin TQFP package
• Temperature range from -40°C to +85°C