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Quantity | Price |
---|---|
1+ | Rs.36.770 |
10+ | Rs.29.940 |
100+ | Rs.23.460 |
500+ | Rs.20.510 |
1000+ | Rs.18.030 |
2500+ | Rs.17.800 |
Product Information
Product Overview
74VHCT125PW,118 is a quad buffer/line driver. It is a high-speed Si-gate CMOS device and is pin-compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard JESD7-A. It provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output-enabled input. A HIGH at n active-low OE causes the outputs to assume a high-impedance OFF-state. It features ESD protection (HBM JESD22-A114E exceeds 2000V, MM JESD22-A115-A exceeds 200V, CDM JESD22-C101C exceeds 1000V).
- Balanced propagation delays, all inputs have a schmitt-trigger action
- Inputs accepts voltages higher than VCC
- CMOS logic levels, supply voltage range from 4.5V to 5.5V
- Input leakage current is 0.1μA max at (VI= 5.5V or GND;VCC = 0V to 5.5V, 25°C)
- Supply current is 2μA max at (VI=VCC or GND;IO = 0A;VCC = 5.5V, 25°C)
- Input capacitance is 3pF typical at (25°C)
- Propagation delay is 3ns typ at (VCC = 4.5V to 5.5V;CL = 15pF, 25°C)
- Operating temperature range from -40°C to +125°C
- TSSOP14 package
Warnings
Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.
Technical Specifications
Buffer / Line Driver, Non Inverting
TSSOP
14Pins
5.5V
74125
125°C
-
No SVHC (21-Jan-2025)
74VHCT125
TSSOP
4.5V
74VHCT
-40°C
-
MSL 1 - Unlimited
Technical Docs (2)
Legislation and Environmental
Country in which last significant manufacturing process was carried outCountry of Origin:Thailand
Country in which last significant manufacturing process was carried out
RoHS
RoHS
Product Compliance Certificate