SPC58EG80E5QEC0X

SPC58EG80E5QEC0X is a SPC58 family 32bit Power Architecture microcontroller for automotive ASIL-D applications. It features high performance e200z4 triple core: 32bit Power Architecture technology CPU, core frequency as high as 180MHz, variable length encoding (VLE), floating point, end-to-end error correction. Also has multi-channel direct memory access controller (eDMA) (one eDMA with 64 channels, one eDMA with 32 channels). Comprehensive new generation ASIL-D safety concept has ASIL-D of ISO 26262 and one CPU channel in lockstep. Dual crossbar switch architecture for concurrent access to peripherals, Flash, or RAM from multiple bus hosts with end-to-end ECC. Boot assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART. Features hardware support for motor control and safety related applications. Also has eight modular controller area network (MCAN) modules, all supporting flexible data rate (CAN-FD).

• AEC-Q100 qualified, dual core, 16KB instruction and 64KB data local RAM
• 1 interrupt controller (INTC), single precision floating point, cache (8KB instruction, 4KB data)
• Enhanced analogue-to-digital converter system, external power supplies from 3.3V to 5V
• Logic BIST, FCCU for collection and reaction to failure notifications
• Memory BIST, cyclic redundancy check (CRC) unit
• Memory error management unit (MEMU) for collection and reporting of error events in memories
• Enhanced modular IO subsystem (eMIOS): up to 64 timed IO channels with 16bit counter resolution
• Versatile low power modes, ultra low power standby w/ RTC, smart wake-up unit for contact monitoring
• Nexus development interface per IEEEISTO 5001-2003 standard, with some support for 2010 standard
• Boot assist flash support factory programming using serial bootload via asynchronous CAN or LIN/UART